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Self-Adaptive Network-on-Chip Interface

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In IEEE Embedded Systems Letters, vol. 5(4), pp. 73-76, 2013.
DOI: 10.1109/LES.2013.2285175.
This paper presents an original approach of bandwidth-oriented self-adaptivity in the domain of Networkon- Chip, where reconfiguration is handled by network interfaces offering traffic with guarantee of service. Reconfiguration is first based on multiple FIFOs with variables bounds and implemented in a single dual-port memory with a dedicated controller. Secondly, it relies on multiple and compliant TDMA tables based on a new heuristic for path computation. Combination of both techniques provide significant bandwidth improvement with a negligible resource overhead. The proposed solution is demonstrated with cycle-accurate VHDL simulation and FPGA implementation for synthetic and image processing applications.
Reconfigurable Network-on-Chip, dynamic reconfiguration, self-adaptivity, network-interfaces
Publication Category:
International journal with reading committee
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